(a) Technical Field
The present disclosure of invention relates to a display device, and more particularly, to a display device including a monolithically integrated gate lines driver where each gate line drive circuit includes a capacitor.
(b) Description of Related Technology
A flat or otherwise thin display device generally includes a display panel including a matrix of pixel units and display drive signal lines as well as a gate lines driver circuit configured to transmit gate signals to respective gate lines among the display drive signal lines. The transmitted gate signals are used to turn on/off switching elements found in of the pixel units. Additionally, the display panel typically includes a data lines driver circuit configured to apply respective data voltages to corresponding data lines among the display drive signal lines and a signals timing controller configured to control the timings of the display panel drive signals.
The liquid crystal display (LCD) is a relatively popular type among the various kinds of flat or otherwise thin display devices, and it typically includes two spaced apart panels with electric field generating electrodes provided thereon such as pixel electrodes and a common electrode, where a liquid crystal material layer is interposed between the spaced apart panels. The liquid crystal display generates an electric field through the liquid crystal layer by applying a voltage across the field generating electrodes, and this determines an optical orientation direction of liquid crystal molecules of the liquid crystal layer, thus controlling polarization of incident light so as to form displayable images. Image quality of the liquid crystal display may be improved if the liquid crystal molecules are controlled well.
At least one pixel electrode included in each pixel unit of the liquid crystal display is connected with a corresponding switching element where the latter is connected to a corresponding gate line and a corresponding data line. The switching element may be a three-terminal element such as a thin film transistor (TFT) and it is used to selectively transfer an extant data voltage on the corresponding data line to its respective pixel electrode.
In the liquid crystal display, the pixel electrode and the common electrode generating the electric field in the liquid crystal layer may be provided on one display panel with the switching element. At least one of the pixel electrode and the common electrode of the liquid crystal display may include a plurality of branch electrodes. When the electric field is generated in the liquid crystal layer, alignment directions of the liquid crystal molecules of the liquid crystal layer are determined by a fringe field generated by the branch electrodes.
Line driving circuits such as the gate lines driver and the data lines driver may be mounted on the display device in an IC chip form, or mounted on a flexible printed circuit film to be attached to the display device in a tape carrier package (TCP) form, or mounted on a printed circuit board. However, recently, at least in the case of the gate lines driver which does not require a very fast switching time (does not require a high charge carrier mobility within the channels of its thin film transistors) because the gate line voltage is maintained constant for at least one horizontal scan period (1 H), a structure, in which the gate driver is not formed as a separate chip but rather it is monolithically integrally included on the display panel and formed by the same mass production process as used for forming the display drive signal lines and the switching elements, is being pursued. When the gate lines drive circuitry is so monolithically integrated, it consumes part of the scarce real estate area that is present on the TFT array panel.
The gate lines driver includes at least one shift register configured as a plurality of cascaded stages dependently connected to each other, and a plurality of signal lines transferring appropriate driving signals to the respective stages of the shift register. The plurality of stages includes a plurality of thin film transistors and capacitors. Each stage is connected to the corresponding gate line, and the plurality of stages sequentially output their respective gate signals to respective ones of the gate lines in a predetermined order.
It is to be understood that this background of the technology section is intended to provide useful background for understanding the here disclosed technology and as such, the technology background section may include ideas, concepts or recognitions that were not part of what was known or appreciated by those skilled in the pertinent art prior to corresponding invention dates of subject matter disclosed herein.